february 2010 FCD9N60NTM n-channel mosfet ?20010 fairchild semiconductor corporation FCD9N60NTM rev. a www.fairchildsemi.com 1 supremos tm FCD9N60NTM n-channel mosfet 600v, 9a, 0.385m features ?r ds(on) = 0.330 ( typ.)@ v gs = 10v, i d = 4.5a ? ultra low gate charge (typ.qg = 17.8nc) ? low effective output capacitance ? 100% avalanche tested ? rohs compliant description the supremos mosfet, fairchild?s next generation of high voltage super-junction mosfets, employs a deep trench filling process that differentiates it fr om preceding multi-epi based tech- nologies. by utilizing this advance technology and preci s e process control, supre mos provide world class rsp, superior switching performance and ruggedness. this supremos mosfet fits the industry?s ac-dc smps requirements for pfc, server/telecom power, fpd tv power, atx power, and industrial power applications. d g s g s d d-pak (to-252) mosfet maximum ratings t c = 25 o c unless otherwise noted thermal characteristics symbol parameter fcd9n60n units v dss drain to source voltage 600 v v gss gate to source voltage 30 v i d drain current -continuous (t c = 25 o c) 9.0 a -continuous (t c = 100 o c) 5.7 i dm drain current - pulsed (note 1) 27 a e as single pulsed avalanche energy (note 2) 135 mj i ar avalanche current 9.0 a e ar repetitive avalanche energy 9.3 mj dv/dt mosfet dv/dt ruggedness 100 v/ns peak diode recovery dv/dt (note 3) 15 p d power dissipation (t c = 25 o c) 92.6 w - derate above 25 o c0.74w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 o c symbol parameter fcd9n60n units r jc thermal resistance, junction to case 1.35 o c/w r ja thermal resistance, junction to ambient 62.5 *drain current limited by maximum junction temperature
FCD9N60NTM n-channel mosfet FCD9N60NTM rev. a www.fairchildsemi.com 2 package marking and ordering information t c = 25 o c unless otherwise noted electrical characteristics off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics device marking device package reel size tape width quantity fcd9n60n FCD9N60NTM d-pak 380mm 16mm 2500 symbol parameter test conditions min. typ. max. units bv dss drain to source breakdown voltage i d = 1ma, v gs = 0v, t j = 25 o c 600 - - v bv dss t j breakdown voltage temperature coefficient i d = 1ma, referenced to 25 o c-0.8-v/ o c i dss zero gate voltage drain current v ds = 480v, v gs = 0v - - 10 a v ds = 480v, v gs = 0v, t c = 125 o c - - 100 i gss gate to body leakage current v gs = 30v, v ds = 0v - - 100 na v gs(th) gate threshold voltage v gs = v ds , i d = 250 a3.0-5.0v r ds(on) static drain to source on resistance v gs = 10v, i d = 4.5a - 0.330 0.385 g fs forward transconductance v ds = 40v, i d = 4.5a - 5.3 - s c iss input capacitance v ds = 100v, v gs = 0v f = 1mhz - 735 1000 pf c oss output capacitance - 40 53 pf c rss reverse transfer capacitance - 3.5 5.5 pf c oss output capacitance v ds = 380v, v gs = 0v, f = 1mhz - 23.7 - pf c oss eff. effective output capacitance v ds = 0v to 380v, v gs = 0v - 122 - pf t d(on) turn-on delay time v dd = 380v, i d = 4.5a r gen = 4.7 (note 4) - 13.2 - ns t r turn-on rise time - 9.6 - ns t d(off) turn-off delay time - 28.7 - ns t f turn-off fall time - 11.5 - ns q g(tot) total gate charge at 10v v ds = 380v, i d = 4.5a v gs = 10v (note 4) -17.8-nc q gs gate to source gate charge - 4.2 - nc q gd gate to drain ?miller? charge - 7.6 - nc esr equivalent series resistance(g-s) drain open - 2.65 - i s maximum continuous drain to source diode forward current - 9.0 - a i sm maximum pulsed drain to source diode forward current - 27 - a v sd drain to source diode forward voltage v gs = 0v, i sd = 9a - - 1.2 v t rr reverse recovery time v gs = 0v, i sd = 9a di f /dt = 100a/ s - 322 - ns q rr reverse recovery charge - 5.04 - c notes: 1. repetitive rating: pulse width limited by maximum junction temperature 2. i as = 3a, r g = 25 , starting t j = 25 c 3. i sd 9a, di/dt 200a/ s, v dd 380v, starting t j = 25 c 4. essentially independent of operating temperature typical characteristics
FCD9N60NTM n-channel mosfet FCD9N60NTM rev. a www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 0.4 1 10 0.1 1 10 60 *notes: 1. 250 s pulse test 2. t c = 25 o c v gs = 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v 5.5 v i d ,drain current[a] v ds ,drain-source voltage[v] 456789 0.1 1 10 50 -55 o c 150 o c *notes: 1. v ds = 20v 2. 250 s pulse test 25 o c i d ,drain current[a] v gs ,gate-source voltage[v] 0 102030 0.3 0.4 0.5 0.6 0.7 0.8 0.9 *note: t c = 25 o c v gs = 20v v gs = 10v r ds(on) [ ] , drain-source on-resistance i d , drain current [a] 0.5 1.0 1.5 1 10 100 *notes: 1. v gs = 0v 2. 250 s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 0 5 10 15 20 0 2 4 6 8 10 *note: i d = 4.5a v ds = 150v v ds = 300v v ds = 480v v gs , gate-source voltage [v] q g , total gate charge [nc] 0.1 1 10 100 600 1 10 100 1000 10000 50000 c oss c iss c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd *note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain-source voltage [v]
FCD9N60NTM n-channel mosfet FCD9N60NTM rev. a www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. on-resistance variation vs. temperature vs. temperature figure 9. maximum safe operating area figure 10. maximum drain current vs. case tempe rature figure 11. transient thermal response curve -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 *notes: 1. v gs = 0v 2. i d = 250 a bv dss , [normalized] drain-source breakdown voltage t j , junction temperature [ o c ] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 *notes: 1. v gs = 10v 2. i d = 4.5a r ds(on) , [normalized] drain-source on-resistance t j , junction temperature [ o c ] 1 10 100 1000 0.01 0.1 1 10 50 20 s 100 s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) *notes: 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 25 50 75 100 125 150 0 2 4 6 8 10 i d , drain current [a] t c , case temperature [ o c ] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 0.005 0.01 0.1 1 2 0.01 0.1 0.2 0.05 0.02 *notes: 1. z jc (t) = 1.35 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z jc (t) 0.5 single pulse thermal response [ z jc ] rectangular pulse duration [sec] t 1 p dm t 2
FCD9N60NTM n-channel mosfet FCD9N60NTM rev. a www.fairchildsemi.com 5 gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
FCD9N60NTM n-channel mosfet FCD9N60NTM rev. a www.fairchildsemi.com 6 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g sam e type as d u t v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( d riv e r ) i sd ( dut ) v ds ( dut ) v dd body d iode forw ard volta g e d rop v sd i fm , body d iode forw ard c urrent body d iode r everse c urrent i rm b ody d iode r ecovery dv/dt di/dt d = g ate pulse w idth gate pulse period -------------------------- dut v ds + _ driver r g sam e type as d u t v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( d riv e r ) i sd ( dut ) v ds ( dut ) v dd body d iode forw ard volta g e d rop v sd i fm , body d iode forw ard c urrent body d iode r everse c urrent i rm b ody d iode r ecovery dv/dt di/dt d = g ate pulse w idth gate pulse period -------------------------- d = g ate pulse w idth gate pulse period --------------------------
FCD9N60NTM n-channel mosfet FCD9N60NTM rev. a www.fairchildsemi.com 7 mechanical dimensions d-pak dimensions in millimeters
FCD9N60NTM n-channel mosfet FCD9N60NTM rev. a www.fairchildsemi.com 8 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes wi thout further notice to any products herein to improve reliability, function, or desi gn. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fai rchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? 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